module Cradare2::Platform::PS2::Registers

Defined in:

cradare2/platform/ps2/registers.cr

Constant Summary

DEFAULT_CANARY = 3735928559_u32
DMAC_CHCR2 = 268476416_u64

Direct Memory Access Controller (DMAC) Registers

DMAC_D_CTRL = 268492800_u64
DMAC_D_PCR = 268492832_u64
DMAC_D_STAT = 268492816_u64
DMAC_MADR2 = 268476432_u64
DMAC_QWC2 = 268476448_u64
DMAC_TADR2 = 268476464_u64
GS_BGCOLOR = 301990112_u64
GS_BUSDIR = 301994048_u64
GS_CSR = 301993984_u64
GS_DISPFB1 = 301990000_u64
GS_DISPFB2 = 301990032_u64
GS_DISPLAY1 = 301990016_u64
GS_DISPLAY2 = 301990048_u64
GS_IMR = 301994000_u64
GS_PMODE = 301989888_u64

Graphics Synthesizer (GS) Privileged Control Registers (0x12000000 - 0x12001080)

GS_REG_NAMES = {REG_PRIM => "PRIM", REG_RGBAQ => "RGBAQ", REG_ST => "ST", REG_UV => "UV", REG_XYZF2 => "XYZF2", REG_XYZ2 => "XYZ2", REG_TEX0_1 => "TEX0_1", REG_TEX0_2 => "TEX0_2", REG_CLAMP_1 => "CLAMP_1", REG_CLAMP_2 => "CLAMP_2", REG_FOG => "FOG", REG_XYZF3 => "XYZF3", REG_XYZ3 => "XYZ3", REG_TEX1_1 => "TEX1_1", REG_TEX1_2 => "TEX1_2", REG_TEX2_1 => "TEX2_1", REG_TEX2_2 => "TEX2_2", REG_XYOFFSET_1 => "XYOFFSET_1", REG_XYOFFSET_2 => "XYOFFSET_2", REG_PRMODECONT => "PRMODECONT", REG_PRMODE => "PRMODE", REG_TEXCLUT => "TEXCLUT", REG_SCANMSK => "SCANMSK", REG_MIPTBP1_1 => "MIPTBP1_1", REG_MIPTBP1_2 => "MIPTBP1_2", REG_MIPTBP2_1 => "MIPTBP2_1", REG_MIPTBP2_2 => "MIPTBP2_2", REG_TEXA => "TEXA", REG_FOGCOL => "FOGCOL", REG_TEXFLUSH => "TEXFLUSH", REG_SCISSOR_1 => "SCISSOR_1", REG_SCISSOR_2 => "SCISSOR_2", REG_ALPHA_1 => "ALPHA_1", REG_ALPHA_2 => "ALPHA_2", REG_DIMX => "DIMX", REG_DTHE => "DTHE", REG_COLCLAMP => "COLCLAMP", REG_TEST_1 => "TEST_1", REG_TEST_2 => "TEST_2", REG_PABE => "PABE", REG_FBA_1 => "FBA_1", REG_FBA_2 => "FBA_2", REG_FRAME_1 => "FRAME_1", REG_FRAME_2 => "FRAME_2", REG_ZBUF_1 => "ZBUF_1", REG_ZBUF_2 => "ZBUF_2", REG_BITBLTBUF => "BITBLTBUF", REG_TRXPOS => "TRXPOS", REG_TRXREG => "TRXREG", REG_TRXDIR => "TRXDIR", REG_HWREG => "HWREG", REG_SIGNAL => "SIGNAL", REG_FINISH => "FINISH", REG_LABEL => "LABEL"}
GS_SMODE1 = 301989904_u64
GS_SMODE2 = 301989920_u64
KSEG0 = 2147483648_u64
KSEG1 = 2684354560_u64
KUSEG_ACCEL = 805306368_u64
KUSEG_CACHED = 0_u64

PS2 Memory Map Segments

KUSEG_UNCACHED = 536870912_u64
REG_ALPHA_1 = 66_u64
REG_ALPHA_2 = 67_u64
REG_BITBLTBUF = 80_u64
REG_CLAMP_1 = 8_u64
REG_CLAMP_2 = 9_u64
REG_COLCLAMP = 70_u64
REG_DIMX = 68_u64
REG_DTHE = 69_u64
REG_FBA_1 = 74_u64
REG_FBA_2 = 75_u64
REG_FINISH = 97_u64
REG_FOG = 10_u64
REG_FOGCOL = 61_u64
REG_FRAME_1 = 76_u64
REG_FRAME_2 = 77_u64
REG_HWREG = 84_u64
REG_LABEL = 98_u64
REG_MIPTBP1_1 = 52_u64
REG_MIPTBP1_2 = 53_u64
REG_MIPTBP2_1 = 54_u64
REG_MIPTBP2_2 = 55_u64
REG_PABE = 73_u64
REG_PRIM = 0_u64

GS Drawing Register IDs

REG_PRMODE = 27_u64
REG_PRMODECONT = 26_u64
REG_RGBAQ = 1_u64
REG_SCANMSK = 34_u64
REG_SCISSOR_1 = 64_u64
REG_SCISSOR_2 = 65_u64
REG_SIGNAL = 96_u64
REG_ST = 2_u64
REG_TEST_1 = 71_u64
REG_TEST_2 = 72_u64
REG_TEX0_1 = 6_u64
REG_TEX0_2 = 7_u64
REG_TEX1_1 = 20_u64
REG_TEX1_2 = 21_u64
REG_TEX2_1 = 22_u64
REG_TEX2_2 = 23_u64
REG_TEXA = 59_u64
REG_TEXCLUT = 28_u64
REG_TEXFLUSH = 63_u64
REG_TRXDIR = 83_u64
REG_TRXPOS = 81_u64
REG_TRXREG = 82_u64
REG_UV = 3_u64
REG_XYOFFSET_1 = 24_u64
REG_XYOFFSET_2 = 25_u64
REG_XYZ2 = 5_u64
REG_XYZ3 = 13_u64
REG_XYZF2 = 4_u64
REG_XYZF3 = 12_u64
REG_ZBUF_1 = 78_u64
REG_ZBUF_2 = 79_u64
SPRAM_END = 1879064576_u64
SPRAM_SIZE = 16384_u64
SPRAM_START = 1879048192_u64

Scratchpad RAM (SPRAM) - 16KB fast on-chip CPU memory